We have developed the most compact and simplest geometry representation not only for external but also for internal (memory) storage. Using the same format for memory, we bring the highest capacity as a result.

Comparing to OASIS, one big difference is in its simplicity. Our representations are way simpler and it brings high reliability and low maintenance cost.

Native external size is little bit bigger than that of OASIS. But we use full 32-bits for coordinate values while OASIS uses only 28-bits which are not suitable for database unit less than 0.1nm. Furthermore, compressed database size is up to 25% smaller than compressed OASIS file size depending on data.

This is invented as the fastest generic multi-dimensional search engine by data structure professional in Computer Science though layout has mere two dimensions. It is much superior to quad tree and any other published data structure.

It was our supprise that other top-notch tools couldn't match the speed of our solution even after 25 years of DRC algorithm development and tons of resources. Even flat DRC on 10mm x 10mm chip took less than an hour for both space and width checks on single CPU, period.

What's more? It can distribute jobs on multi-CPUs even on Windows. With the latest quad-core CPU, you can run 4X faster. Heterogeneous Distributed Processing on Linux platforms (different speeds, OS versions, Intel/AMD, Desktop/Notebook/Linux Clusters/Parallel Machines) shows straightforward scaling of performance to hundred CPUs. You do not need very expensive machines.

Our hierarchy handling is designed specially for the layout modification including ROPC/MOPC targeting for the smallest output though it can be used for the checking too. It produces optimal output of cell based pattern matching.

We observed that full chip hierarchical modification was processed in 10 minutes on many chips and output size was 3-5X smaller than that of others. Two or more consecutive hierarchical operations showed exponential difference in terms of speed and output size. Overall speed could be 10X faster than that of the state of art.
Well structured chips such as FPGA and DSP chips were matter of seconds, not minutes. All on single CPU.